Title :
Amorphous silicon thin film transistor with a buried double-gate structure
Author :
Kaneko, Y. ; Tsutsui, K. ; Matsumaru, H. ; Yamamoto, H. ; Tsukada, T.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
An amorphous silicon thin-film transistor (a-Si TFT) with a novel structure is described. A second gate electrode is introduced into a gate insulator of silicon nitride in addition to the conventional staggered a-Si TFT gate electrode. The performance of this TFT is characterized in terms of geometry and operating conditions. Equivalent electron mobility up to 1.8 cm/sup 2//(V-s) is achieved for optimized designs. It is also confirmed that the newly developed TFT preserves high reliability. Results of I-V measurements demonstrated that the on-current of a buried double-gate (BD) TFT reaches three times that of a conventional TFT. The V/sub t/ shift of the BD-TFT is about one-third that of the conventional TFT for the same gate electric field. The performance is suitable for large-area, high-resolution liquid-crystal displays.<>
Keywords :
amorphous semiconductors; carrier mobility; elemental semiconductors; silicon; thin film transistors; I-V measurements; Si-SiN; amorphous silicon thin-film transistor; buried double-gate structure; electron mobility; gate electric field; gate insulator; high reliability; high-resolution liquid-crystal displays; on-current; optimized designs; second gate electrode; Amorphous silicon; Chromium; Electrodes; Fabrication; Insulation; Liquid crystal displays; Plasma applications; Silicon compounds; Thin film transistors; Voltage;
Conference_Titel :
Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1989.74292