DocumentCode
252086
Title
Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems
Author
Payandehnia, Pedram ; Maghami, Hamidreza ; Xin Meng ; Temes, Gabor C. ; Yoshizawa, Hirokazu
Author_Institution
Electr. Eng. & Comput. Sci. Dept., Oregon State Univ., Corvallis, OR, USA
fYear
2014
fDate
3-6 Aug. 2014
Firstpage
262
Lastpage
265
Abstract
A novel sequential inter-stage correlated double sampling technique has been proposed. This technique provides considerable enhancement in the effective accuracy of a switched-capacitor architecture. Superior accuracy and thermal noise performance is achieved compared to the conventional correlated double sampling technique. The proposed approach provides higher input signal bandwidth by reducing the number of clock phases using a predictive phase compared to the other sequential techniques to achieve the same performance. Also, the proposed approach has the capability of driving both resistive and capacitive loads.
Keywords
sampling methods; switched capacitor networks; thermal noise; capacitive loads; clock phases; high accuracy systems; higher input signal bandwidth; predictive phase; resistive loads; sequential interstage correlated double sampling technique; switched-capacitor technique; thermal noise performance; Accuracy; Capacitance; Capacitors; Clocks; Gain; Noise; Thermal noise; correlated double sampling; switched-capacitor circuits; thermal noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
Conference_Location
College Station, TX
ISSN
1548-3746
Print_ISBN
978-1-4799-4134-6
Type
conf
DOI
10.1109/MWSCAS.2014.6908402
Filename
6908402
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