Robust implementation and statistical modeling of a VI-converter

Author

Graupner, A. ; Schüffny, R.

Author_Institution

Dept. of Electr. Eng., Tech. Univ. Dresden, Germany

fYear

2000

fDate

2000

Firstpage

83

Lastpage

88

Abstract

A VI-converter is presented with adjustable transconductance suited for low-power operation through transistors biased in weak and moderate inversion. It can process unipolar differential input voltages or perform a correlated double sampling on a single-ended input signal. The influence of random device parameter variation is considered and a robust circuit topology is suggested which highly compensates it. The circuit is statistically characterized using variance calculation which requires much less computational effort than a Monte-Carlo analysis. The VI-converter is implemented in a 0.6 μm technology on 48×90 μm² silicon area. The maximum single-ended output current can be up to 1 μA at 5 V supply voltage

Keywords

CMOS analogue integrated circuits; analogue processing circuits; convertors; image processing equipment; network topology; numerical analysis; statistical analysis; transfer functions; 0.6 μm technology; 0.6 mum; 1 muA; 48×90 μm² Si area; 5 V; 5 V supply voltage; CMOS imager; Si; VI-converter; computational effort; correlated double sampling; moderate inversion; random device parameter variation; robust circuit topology; single-ended input signal; statistical modeling; unipolar differential input voltages; up to 1 μA; variance calculation; weak inversion; Circuit simulation; Computational modeling; Geometry; Power dissipation; Robustness; Sensor arrays; Signal processing; Signal sampling; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits and Systems Design, 2000. Proceedings. 13th Symposium on

Conference_Location

Manaus

Print_ISBN

0-7695-0843-X

Type

conf

DOI

10.1109/SBCCI.2000.876012

Filename

876012