A reconfigurable integrated circuit for high performance computer arithmetic

In this paper, we present the design of a novel Field Programmable Gate Array (FPGA) which contains the necessary logic elements to support high performance computer arithmetic. The FPGA contains a routing framework and logic cell structure which is suited to computer arithmetic, image processing, digital signal processing and similar computationally intensive applications. The architecture is both flexible and reconfigurable and will support operands of various sizes for fixed point parallel and serial binary computations