• DocumentCode
    2521866
  • Title

    A high-resolution DLL-based digital-to-time converter for DDS applications

  • Author

    Baronti, F. ; Fanucci, L. ; Lunardini, D. ; Roncella, R. ; Saletti, R.

  • Author_Institution
    Dipt. di Ingegneria dell´´Informazione: Elettronica, Informatica, Telecomunicazioni, Pisa Univ., Italy
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    649
  • Lastpage
    653
  • Abstract
    A Digital-to-Time Converter (DTC) based on a Delay-Locked Loop (DLL) for phase interpolation in Direct Digital Synthesis (DDS) applications is described. The conversion is made in two steps using digitally controllable delay cells with configurable shunt-capacitors load. The circuit is able to interpolate a 120 MHz clock, generating a delay proportional to an 8-bit digital control word with 32 ps resolution. The DDS system clock frequency is thus virtually enhanced up to about 30 GHz, achieving a strong reduction of the spurious component level. The 256 level interpolation is achieved using only 35 delay elements (excluding dummy cells).
  • Keywords
    delay lock loops; digital-analogue conversion; direct digital synthesis; interpolation; 120 MHz; 30 GHz; 32 ps; 8 bit; DDS applications; DLL-based digital-to-time converter; DTC; configurable shunt-capacitors load; delay-locked loop; digitally controllable delay cells; direct digital synthesis applications; high-resolution digital-to-time converter; phase interpolation; time interpolation; Circuit synthesis; Clocks; Communication switching; Delay effects; Digital control; Energy consumption; Frequency; Interpolation; Phase locked loops; Read only memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Frequency Control Symposium and PDA Exhibition, 2002. IEEE International
  • Print_ISBN
    0-7803-7082-1
  • Type

    conf

  • DOI
    10.1109/FREQ.2002.1075962
  • Filename
    1075962