• DocumentCode
    2521919
  • Title

    Efficient νMOS realization of threshold voters for self-purging redundancy

  • Author

    Quintana, J.M. ; Avedillo, M.J. ; Rodriguez-Villegas, E. ; Rueda, A.

  • Author_Institution
    Inst. de Microelectron., Centro Nacional de Microelectron., Seville, Spain
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    321
  • Lastpage
    326
  • Abstract
    In spite of its very simple switching mechanism, straightforward design, and that it is more simple and reliable than other hybrid approaches, self-purging hybrid technique is not commonly used for fault tolerance mainly due to the lacking of practical implementations of its key component the threshold voter. This paper presents an efficient realization of the classic Losq´s self-purging redundancy scheme with automatic threshold adjustment to provide the best tolerance to multiple failures during all the system´s lifetime. Our implementation solves the difficulty imposed by the circuit realization of the threshold gate by resorting to the νMOS concept and to a very efficient decomposition technique
  • Keywords
    CMOS logic circuits; combinational circuits; fault tolerance; integrated circuit reliability; logic gates; neural chips; redundancy; sorting; threshold logic; νMOS concept; automatic threshold adjustment; circuit realization; combinational circuit; efficient decomposition technique; efficient neuron-MOS realization; fault masking; fault tolerance; floating gate concept; self-purging redundancy; sorter; threshold gate; threshold voters; tolerance to multiple failures; Circuits; Clocks; Fault tolerance; Hardware; Redundancy; Switches; Tin; Voting;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits and Systems Design, 2000. Proceedings. 13th Symposium on
  • Conference_Location
    Manaus
  • Print_ISBN
    0-7695-0843-X
  • Type

    conf

  • DOI
    10.1109/SBCCI.2000.876049
  • Filename
    876049