Output-capacitor-free adaptively biased low-dropout regulators

This paper presents the design and experimental characterization of two output-capacitor-free adaptively biased low-dropout regulators (AB LDRs) for system-on-chip applications. The low-voltage high-precision AB LDRs adopt Miller compensation and Q-reduction technique to achieve high stability over a wide load current range, without relying on a large off-chip capacitor. The first implementation of adaptive biasing uses a simple current mirror and is more area efficient; the second one uses a symmetrically matched current-voltage mirror and achieves more accurate sensing of load current. The design considerations and stability strategies are discussed. The two AB LDRs and their counterpart, a fixed-biased LDR, are fabricated using a standard 0.35-μm CMOS process. The minimum input voltage is 1.2 V, the preset output voltage is 1.0 V and the maximum load current is 100 mA. Measurement results verify that the AB LDRs improve the line and load transient responses and power supply rejections significantly, while maintaining tight regulation, low quiescent current and high current efficiency.