• DocumentCode
    252227
  • Title

    A passive 2nd-order sigma-delta modulator for low-power analog-to-digital conversion

  • Author

    Roy, Anirban ; Baker, R. Jacob

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Nevada, Las Vegas, NV, USA
  • fYear
    2014
  • fDate
    3-6 Aug. 2014
  • Firstpage
    595
  • Lastpage
    598
  • Abstract
    A passive 2nd-order sigma-delta modulator based on a cascade of first-order lowpass filters was designed, fabricated, and tested. A lumped RC filter is added in the loop of a conventional 1st-order passive sigma-delta modulator in order to improve the linearity of its transfer function. A low power edge-triggered comparator was designed and fabricated along with lumped components in ON Semiconductor´s C5 500-nm process. The implementation achieved a THD below 1% for all frequencies between 10 Hz and 5 kHz. With a 5 V supply the power consumption of the sigma-delta modulator is 64.5 uW to 150 uW depending on the input signal.
  • Keywords
    comparators (circuits); harmonic distortion; low-pass filters; low-power electronics; sigma-delta modulation; transfer functions; THD; first-order lowpass filters; frequency 10 Hz to 5 kHz; low power edge-triggered comparator; low-power analog-to-digital conversion; lumped RC filter; passive 2nd-order sigma-delta modulator; power 64.5 muW to 150 muW; size 500 nm; total harmonic distortion; transfer function; voltage 5 V; Clocks; Digital filters; Modulation; Power demand; Resistors; Topology; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
  • Conference_Location
    College Station, TX
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4799-4134-6
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2014.6908485
  • Filename
    6908485