DocumentCode :
2523459
Title :
The midlifekicker microarchitecture evaluation metric
Author :
Vassiliadis, Stamatis ; Sousa, Leonel ; Gaydadjiev, Georgi N.
Author_Institution :
Comput. Eng., TU Delft, Netherlands
fYear :
2005
fDate :
23-25 July 2005
Firstpage :
92
Lastpage :
97
Abstract :
We introduce the midlfekicker metric for evaluating microarchitectures mostly during the design process. We assume a microarchitecture designed at a time T-1 and estimate if a new microarchitecture projected for time T has advantages over the microarchitecture designed at T-1 and remapped on the same technology at time T. We consider that microarchitects minimize the product cycles per instruction (CPI) x cycle time and estimate performance based on CPI with a soft-threshold to include cycle time product effects. Some measurements are also reported.
Keywords :
computer architecture; performance evaluation; cycles per instruction; microarchitecture evaluation; midlifekicker metric; CMOS logic circuits; Chip scale packaging; Counting circuits; Design engineering; Logic design; Logic gates; Microarchitecture; Paper technology; Pipelines; Process design; ILP; microarchitecture; pipeline;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on
ISSN :
2160-0511
Print_ISBN :
0-7695-2407-9
Type :
conf
DOI :
10.1109/ASAP.2005.62
Filename :
1540371
Link To Document :
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