• DocumentCode
    2523597
  • Title

    Automated instruction-set extension of embedded processors with application to MPEG-4 video encoding

  • Author

    Kavvadias, Nikolaos ; Nikolaidis, Spiridon

  • Author_Institution
    Dept. of Phys., Aristotle Univ. of Thessaloniki, Greece
  • fYear
    2005
  • fDate
    23-25 July 2005
  • Firstpage
    140
  • Lastpage
    145
  • Abstract
    A recent approach to platform-based design involves the use of extensible processors, offering architecture customization possibilities. Part of the designer responsibilities is the domain-specific extension of the baseline processor to fit customer requirements. Key issues of this process are the automated application analysis and candidate instruction identification/selection for implementation as application-specific functional units (AFUs). In this paper, a design approach that encapsulates automated workload characterization and instruction generation is utilized for extending processors to efficiently support embedded application sets. The method used for instruction generation is a highly parameterized adaptation of the MaxMISO technique, which allows for fast design space exploration. It is proven that only a small number of AFUs are needed in order to support the algorithms of interest (MPEG-4 encoding kernels) and that it is possible to achieve 2× to 3.5× performance improvements although further possibilities such as subword parallelization are not currently regarded.
  • Keywords
    embedded systems; instruction sets; microcomputers; video coding; MPEG-4 video encoding; MaxMISO; application-specific functional unit; automated instruction-set extension; automated workload characterization; embedded processor; extensible processor; instruction generation; Application software; Delay estimation; Design optimization; Encoding; Instruction sets; Kernel; MPEG 4 Standard; Motion estimation; Optimizing compilers; Space exploration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on
  • ISSN
    2160-0511
  • Print_ISBN
    0-7695-2407-9
  • Type

    conf

  • DOI
    10.1109/ASAP.2005.20
  • Filename
    1540378