Virtual hierarchical design representations for distributed optimization of multi-million gate designs

A virtual hierarchical design optimization method has been developed to combine strength of the flat and the hierarchical optimization methods for efficient and quality optimization of multi-million gate designs in a distributed computing environment. A novel design representation "virtual hierarchy" is proposed for sub-design optimization in a distributed computing environment. The principle and the implementation details of the method are described. The method has been successfully applied to a number of designs.