Title :
Zippy - a coarse-grained reconfigurable array with support for hardware virtualization
Author :
Plessl, Christian ; Platzner, Macro
Author_Institution :
Comput. Eng. & Networks Lab., ETH Zurich, Switzerland
Abstract :
This paper motivates the use of hardware visualization on coarse-grained reconfigurable architectures. We introduce Zippy, a coarse-grained multi-context hybrid CPU with architectural support for efficient hardware virtualization. The architectural details and the corresponding tool flow are outlined. As a case study, we compare the non-virtualized and the virtualized execution of an ADPCM decoder.
Keywords :
reconfigurable architectures; virtual machines; ADPCM decoder; Zippy; coarse-grained reconfigurable array; hardware virtualization; multicontext hybrid CPU; Application virtualization; Computer architecture; Computer networks; Computer science; Concrete; Decoding; Hardware; Platform virtualization; Reconfigurable architectures; Virtual machining;
Conference_Titel :
Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on
Print_ISBN :
0-7695-2407-9
DOI :
10.1109/ASAP.2005.69
