A low-voltage, adaptive CMOS centroid image sensor with improved bandwidth

Conventional centroid architectures employ an image sensor sampled at high frame rates, analog-to-digital conversion, and digital signal processing to compute the image centroid. Latency and/or power dissipation may become prohibitively large. Therefore, fast single-chip centroid computation circuits are gaining importance in adaptive optics applications. To this end we present a fully-integrated centroid computation sensor with improved bandwidth using a transimpedance amplifier with a novel adaptive pole tracking technique. The circuit is designed to operate over five orders of magnitude of light intensity. The outputs are two signals representing the (x, y) centroid coordinates. A 48×48 pixel array was fabricated in a 0.5-μm CMOS process. Chip measurements verify a bandwidth improvement of 6 times. The supply is 1.8 V, total power consumption is 2.16 mW, and core area is 2.18 mm².