RF digital predistorter implementation using polynomial optimization

The research presented focuses on implementation of RF digital predistorters using polynomial optimization techniques. By representing the system with a set of two polynomials, we have been able to apply algebraic techniques resulting in reduction in cost of implementing digital predistorters. To test this approach we have used model of a communication channel using traveling wave tube amplifier and we have compared our method with the direct and buffered evaluation of Volterra series representing this system. Our design decreases the number of multiplications by 35% and the number of adders by 12.9% in comparison with the best technique previously used. The FPGA implementation also demonstrated decrease of 29% in DSP usage and decrease of 71.5% in logic blocks. We saw an increase of 30% in speed comparing to the previous attempts due to smaller bit-width operations and lower routing complexity of our optimized solution.