Testing embedded-core based system chips

Author

Zorian, Yervant ; Marinissen, Erik Jan ; Dey, Sujit

Author_Institution

Logic Vision, San Jose, CA, USA

fYear

1998

fDate

18-23 Oct 1998

Firstpage

130

Lastpage

143

Abstract

Advances in semiconductor process and design technology enable the design of complex system chips. Traditional IC design in which every circuit is designed from scratch and reuse is limited to standard-cell libraries, is more and more replaced by a design style based on embedding large reusable modules, the so-called cores. This core-based design poses a series of new challenges, especially in the domains of manufacturing test and design validation and debug. This paper provides an overview of current industrial practices as well as academic research in these areas. We also discuss industry-wide efforts by VSIA and IEEE P1500 and describe the challenges for future research

Keywords

IEEE standards; automatic testing; built-in self test; design for testability; embedded systems; integrated circuit testing; production testing; DRAM; DSP; IC design; IEEE P1500; RISC processor; VSIA; core-based design; debugging; design validation; embedded-core based system chips; embedding; industrial practices; manufacturing test; modules; semiconductor process; standard-cell libraries; system chip level test; test pattern source; Assembly systems; Buildings; CMOS technology; Circuit testing; Floors; Intellectual property; Libraries; Manufacturing industries; Manufacturing processes; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1998. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-5093-6

Type

conf

DOI

10.1109/TEST.1998.743146

Filename

743146