ARMISS: An Instruction Set Simulator for the ARM Architecture

Author

Lv, Mingsong ; Deng, Qingxu ; Guan, Nan ; Xie, Yaming ; Yu, Ge

Author_Institution

Inst. of Comput. Software & Theor., Northeastern Univ., Shenyang

fYear

2008

fDate

29-31 July 2008

Firstpage

548

Lastpage

555

Abstract

The development efficiency of embedded systems is highly pressured due to the pursuit of short time-to-market of embedded products. In traditional design flow, although software can be developed in parallel with the hardware platform, it can only be tested and verified after the platform is fabricated. ARMISS, an Instruction Set Simulator for the ARM architecture, is developed to enable early software testing and verification. The ARM instruction set, MMU and interrupt handling are emulated in this tool. An instruction caching technique is designed to accelerate the interpretation-based instruction emulation. ARMISS is implemented in the C programming language, thus is highly portable across varies host operating systems for embedded system design.

Keywords

C language; cache storage; computer architecture; embedded systems; instruction sets; interrupts; logic simulation; microprocessor chips; program testing; program verification; ARM architecture; ARMISS instruction set simulator; C programming language; MMU; embedded system design; host operating system; instruction caching technique; interpretation-based instruction emulation; interrupt handling; software testing; software verification; Acceleration; Computer architecture; Computer languages; Embedded system; Emulation; Hardware; Product design; Software design; Software testing; Time to market;

fLanguage

English

Publisher

ieee

Conference_Titel

Embedded Software and Systems, 2008. ICESS '08. International Conference on

Conference_Location

Sichuan

Print_ISBN

978-0-7695-3287-5

Type

conf

DOI

10.1109/ICESS.2008.73

Filename

4595609