DocumentCode :
2524358
Title :
A Routing-Level Solution for Fault Detection, Masking, and Tolerance in NoCs
Author :
Xiaofan Zhang ; Ebrahimi, Masoumeh ; Letian Huang ; Guangjun Li ; Jantsch, Axel
Author_Institution :
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear :
2015
fDate :
4-6 March 2015
Firstpage :
365
Lastpage :
369
Abstract :
Faults may occur in numerous locations of a router in a NoC platform. Compared with the faults in the data path, faults in the control path may cause more severe effects which may result in crashing the entire system. Most of the current efforts in literature focus on disabling a router when a fault is detected. Considering this level of coarse-granularity, the functioning parts of a router have to be unnecessarily disabled which may severely affect the performance or functionality of the on-chip network. To cope with this problem, in this paper we propose a mechanism to tolerate faults in the control path which largely avoid disabling a router as long as the fault is not severe. This mechanism is called DMT, standing for three distinguishing characteristics of the proposed method as fault Detection, fault Masking and fault Tolerance. The proposed mechanism can efficiently detect the faults expressed as illegal turns while it has the capability to tolerate faults without a prior knowledge on where and why a fault has happened.
Keywords :
fault tolerant computing; network-on-chip; DMT; NoC platform; data path; fault detection; fault masking; fault tolerance; on-chip network; routing-level solution; Algorithm design and analysis; Circuit faults; Classification algorithms; Fault detection; Fault tolerance; Fault tolerant systems; Routing; Network-On-Chip; fault-tolerance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel, Distributed and Network-Based Processing (PDP), 2015 23rd Euromicro International Conference on
Conference_Location :
Turku
ISSN :
1066-6192
Type :
conf
DOI :
10.1109/PDP.2015.87
Filename :
7092746
Link To Document :
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