Title :
CMOS IC reliability indicators and burn-in economics
Author :
Righter, Alan W. ; Hawkins, Charles F. ; Soden, Jerry M. ; Maxwell, Peter
Author_Institution :
Analog Devices Inc., Wilmington, MA, USA
Abstract :
Sensitive IDDQ and LVMF (low VDD, maximum frequency) tests were done to examine reliability indicators and burn-in economics for CMOS ICs. These experiments used 3,495 CMOS 1 Mb SRAMs for special IDDQ tests, LVMF tests, burn-in and life tests, and failure analysis. IDDQ was measured at the maximum VDD tolerated by the IC, ranging from 40% to 60% above the nominal V DD. These data indicate that elevated voltage IDDQ screening can replace burn-in for CMOS ICs, including ICs from poor quality (rogue or maverick) lots. A low reliability risk group (27% of the population) that failed only IDDQ tests was identified by IDDQ signatures and life tests. Two other defect classes were examined for this yield reclamation potential for ICs that failed only I DDQ tests
Keywords :
CMOS memory circuits; SRAM chips; electric current measurement; fault diagnosis; integrated circuit economics; integrated circuit reliability; integrated circuit testing; integrated circuit yield; 1 Mbit; CMOS IC; IDDQ signatures; IDDQ tests; LVMF; LVMF tests; SRAM; burn-in; burn-in economics; elevated voltage screening; failure analysis; life tests; maverick; reliability indicators; rogue; yield reclamation; CMOS integrated circuits; Costs; Economic indicators; Failure analysis; Frequency; Integrated circuit testing; Life testing; Random access memory; Stress; Voltage;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743152
