Title :
On-chip sensor selection for effective speed-binning
Author :
Qihang Shi ; Tehranipoor, Mohammad ; Xiaoxiao Wang ; Winemberg, LeRoy
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT, USA
Abstract :
Advance in technology nodes of IC fabrication has introduced increased variation. This presents new challenges for delay testing. To address this challenge, speed-binning based on on-chip delay sensor measurements has been proposed as alternative to current speed-binning methods. This practice requires advanced data analysis techniques for the binning result to be accurate. In this paper, based on experiments with silicon data collected from on-chip delay sensors in a commercial design using a sub-65 nm process, we demonstrate that optimizing sensor selection can benefit speed-binning accuracy. An optimization algorithm is presented, and result showed it is capable of improving accuracy beyond 93%.
Keywords :
circuit optimisation; delays; integrated circuit testing; sensors; IC fabrication technology nodes; advanced data analysis techniques; delay testing; effective speed-binning method; on-chip delay sensor measurements; on-chip sensor selection; optimization algorithm; silicon data; Accuracy; Algorithm design and analysis; Delays; Inverters; Optimization; System-on-chip; Wires;
Conference_Titel :
Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
Conference_Location :
College Station, TX
Print_ISBN :
978-1-4799-4134-6
DOI :
10.1109/MWSCAS.2014.6908604