Behavioral model of V and V+ gates to implement the reversible circuits using quantum gates

This paper addresses using quantum gates to implement binary reversible logic circuits. We propose behavioral models for well known V and V⁺ quantum gates. Our proposed representation is used to synthesize reversible logic circuits instead of using the known unitary matrix form of quantum gates. This technique allows V and V⁺ gates to be represented in truth table forms. Results show that our technique can be used to synthesize circuits with bigger sizes and gate counts in compare with unitary matrix form of these gates. Several reversible circuit benchmarks are optimized and compared to related works.