Scaling friendly design methodology for inductively-degenerated RF low-noise amplifiers

Various design methodologies for common-source low noise amplifiers (LNAs) in Si CMOS technologies were proposed in the past. These start from long-channel assumptions to derive analytic design equations. This paper compares the various existing LNA design methodologies and verifies the long-channel assumptions using a commercial. 13 mum CMOS technology. After demonstrating that the design assumptions are no longer valid, a new methodology is proposed which enables the LNA design in a systematic way, without the drawback that it is relying on a particular transistor model for computing the input impedance and the noise figure. This makes the proposed technique robust to transistor model changes in future technology nodes.