Impacts of random telegraph noise on the analog properties of FinFET and trigate devices and Widlar current source

We investigate the impacts of the single charged trap induced Random Telegraph Noise (RTN) on the analog properties of FinFET and Trigate devices. A comprehensive comparative analysis between FinFET and Trigate device is carried out for the trap located along the channel length and fin height direction employing 3D atomistic TCAD simulations, and the resulting impacts on g_m, r_o, f_T and Wildar current source examined. The results indicate that Trigate device, with larger (smaller) fraction of electron current flowing near the bottom (top) region of the fin, suffers larger (smaller) RTN degradation when the trap is located at the bottom (top) region of the fin. As such, the RTN amplitude in Trigate device has broader dispersion and stronger dependence on the location of the trap compared with FinFET device. For trap positioned along the channel length direction, the single trap located near the source region has the largest influence on the output resistance (Δ_ro/r_o) when the device operates at saturation region (V_D= 1V), because the sensitivity of ID to ΔV_D becomes higher as the potential barrier for carrier injection near the source is significantly perturbed. The variability of RTN Δg_m/g_m under fin Line Edge Roughness (LER) and Work Function Variation (WFV) is examined, and Trigate device is shown to exhibit larger nominal Δg_m/g_m and larger s(Δg_m/g_m). The Widlar current source is used as an example to illustrate the impacts of RTN on analog circuit. The combinations of trapping/detrapping in the current source device and mirroring/output device, and the dependence of ΔI_out/I_out on their VGS difference are examined. The Trigate device exhibits larger ΔI_out/I_out and larger s(ΔI_out/I_out), and the di- ference between Trigate and FinFET becomes more significant with decreasing gate over-drive.