DocumentCode :
2525293
Title :
A 28 mW, 1.5 V GPS receiver in 0.25 μm silicon-on-sapphire CMOS process
Author :
Adamski, Jaroslaw ; Losser, Daniel ; Nobbe, Dan ; Kuramochi, Takashi ; Fujita, Ken ; Pucci, Gregory ; Dribinsky, Alexander
Author_Institution :
Peregrine Semicond. Corp., San Diego
fYear :
2007
fDate :
8-10 Oct. 2007
Firstpage :
271
Lastpage :
274
Abstract :
This paper describes a 28 mW, 1.5 V Global Positioning System (GPS) radio receiver chip implemented in a 0.25 mum silicon-on-sapphire CMOS process. The receiver uses a low IF architecture and achieves a cascaded noise figure of 3.5 dB including the RF SAW filter. The design takes advantage of the matching network integration capabilities and superb isolation properties of Peregrine´s UltraCMOS silicon-on-sapphire process technology.
Keywords :
CMOS integrated circuits; Global Positioning System; radio receivers; sapphire; 0.25 mum silicon-on-sapphire CMOS process; GPS radio receiver chip; Global Positioning System; cascaded noise figure; isolation properties; low IF architecture; matching network integration; power 28 mW; size 0.25 mum; voltage 1.5 V; CMOS process; Global Positioning System; Impedance matching; Matched filters; Noise figure; Noise measurement; Radio frequency; Receivers; SAW filters; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuit Conference, 2007. EuMIC 2007. European
Conference_Location :
Munich
Print_ISBN :
978-2-87487-002-6
Type :
conf
DOI :
10.1109/EMICC.2007.4412701
Filename :
4412701
Link To Document :
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