Title :
Variability in Fully Depleted MOSFETs
Author :
Vinet, M. ; Hook, T. ; Le Tiec, Y. ; Murphy, R. ; Ponoth, S. ; Grenouillet, L. ; Wacquez, R.
Author_Institution :
CEA-LETI, Grenoble, France
fDate :
May 30 2012-June 1 2012
Abstract :
Threshold voltage variability in Fully Depleted MOSFETs transistors is usually much better than in bulk devices because of the suppression of channel doping. This paper reviews in details the specificities of variability in such devices and highlights that SOI boosters (such as back bias or embedded strain in the substrate) do degrade the matching properties.
Keywords :
MOSFET; semiconductor doping; silicon-on-insulator; SOI booster; back bias; channel doping suppression; embedded strain; fully depleted MOSFET; matching properties; threshold voltage variability; transistor; Fluctuations; Logic gates; MOSFETs; Metals; Threshold voltage; Very large scale integration; ETSOI; MOS transistors; Thin BOX; variability;
Conference_Titel :
IC Design & Technology (ICICDT), 2012 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-0146-6
Electronic_ISBN :
pending
DOI :
10.1109/ICICDT.2012.6232868
