Title :
Strained silicon on insulator substrates for fully depleted application
Author :
Schwarzenbach, W. ; Daval, N. ; Kerdilès, S. ; Chabanne, G. ; Figuet, C. ; Guerroudj, S. ; Bonnin, O. ; Cauchy, X. ; Nguyen, B.Y. ; Maleville, C.
Author_Institution :
SOITEC, Crolles, France
fDate :
May 30 2012-June 1 2012
Abstract :
Smart Cut™ technology is used to manufacture Strained-SOI (sSOI) substrates. These substrates are proposed to boost performance for both planar and FinFET Fully Depleted SOI devices. To comply with tight transistor variability requirements, strong emphasis has been put on layer thickness control and low stress variation. A 1.2 Å RMS roughness and less than 10% stress fluctuation are already demonstrated for sSOI wafers.
Keywords :
MOSFET; silicon-on-insulator; FinFET fully depleted SOI device; RMS roughness; Smart Cut technology; layer thickness control; low stress variation; planar fully depleted SOI device; sSOI wafer; strained silicon on insulator substrate; strained-SOI substrate; stress fluctuation; transistor variability requirement; Epitaxial growth; Silicon; Silicon germanium; Silicon on insulator technology; Stress; Substrates; Thickness control; Fully-Depleted; Strained-Silicon-on-Insulator;
Conference_Titel :
IC Design & Technology (ICICDT), 2012 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-0146-6
Electronic_ISBN :
pending
DOI :
10.1109/ICICDT.2012.6232869
