Title :
On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers
Author :
Chen, Chih-Lin ; Tseng, Hsin-Yuan ; Kuo, Ron-Chi ; Wang, Chua-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fDate :
May 30 2012-June 1 2012
Abstract :
A novel PVT (Process, Voltage, Temperature) detection and compensation technique is proposed to automatically adjust the slew rate of a 2×VDD output buffer. The threshold voltage (Vth) of PMOSs and NMOSs varying with process, voltage, and temperature deviation could be detected, respectively. The proposed design is implemented using a typical 90 nm CMOS process to justify the performance. By adjusting output currents, the slew rate of output signal could be compensated over 26% and the maximum data rate is 330 MHz.
Keywords :
CMOS integrated circuits; temperature; CMOS process; NMOS; PMOS; PVT compensation; PVT detection; VDD output buffer; frequency 330 MHz; on-chip MOS PVT variation monitor; output current; process-voltage-temperature; size 90 nm; slew rate self-adjustment; temperature deviation; threshold voltage; CMOS process; Digital circuits; Generators; MOS devices; Temperature sensors; Threshold voltage; I/O buffer; PVT variation; floating N-well circuit; gate-oxide reliability; mixed-voltage tolerant; threshold voltage detection;
Conference_Titel :
IC Design & Technology (ICICDT), 2012 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-0146-6
Electronic_ISBN :
pending
DOI :
10.1109/ICICDT.2012.6232876
