A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-Biasing

Author

Soussan, Dimitri ; Valentian, Alexandre ; Majcherczak, Sylvain ; Belleville, Marc

Author_Institution

STMicroelectron. Crolles, Crolles, France

fYear

2012

fDate

May 30 2012-June 1 2012

Firstpage

1

Lastpage

4

Abstract

A mixed analog/digital impedance calibration circuit for LPDDR2 transmitter is proposed, taking advantage of the Fully Depleted SOI technology and its back biasing capability. This feature allows to modulate the current, and hence the impedance of the output driver. While the process deviation is compensated digitally, the proposed technique gives the opportunity to compensate for temperature and voltage drifts during transmission thanks to back biasing control.

Keywords

driver circuits; electric impedance; integrated circuit testing; silicon-on-insulator; LPDDR2 transmitter; double data rate; fully-depleted SOI back-biasing; mixed LPDDR2 impedance calibration; mixed analog-digital impedance calibration circuit; output driver impedance; size 28 nm; temperature; voltage drift; Arrays; Calibration; Impedance; Resistance; Standards; Transistors; Transmitters; Back-Biasing; FDSOI; Impedance Calibration; LPDDR2; Output driver; Reflection; Signal integrity;

fLanguage

English

Publisher

ieee

Conference_Titel

IC Design & Technology (ICICDT), 2012 IEEE International Conference on

Conference_Location

Austin, TX

ISSN

pending

Print_ISBN

978-1-4673-0146-6

Electronic_ISBN

pending

Type

conf

DOI

10.1109/ICICDT.2012.6232877

Filename

6232877