A fast and area efficient 2-D convolver for real time image processing

Two dimentional (2-D) convolver is a basic processing unit used in real time video and image processing algorithms. VLSI chip area and external memory bus bandwidth are two major concerns of efficient and fast 2-D convolver. Till now people have considered both of these parameters separately. Achieving low complexity and high packing density at the same time is a difficult task. This paper proposes a new FPGA oriented architecture which uses a multiplierless 2-D convolver with area efficient buffering scheme which achieves high speed and saves up to 80% of chip area at the same time.