DocumentCode
2526116
Title
Design and implementation of a low-complexity RAKE receiver and Channel Estimator for DS-UWB
Author
Thomos, Christos ; Papadopoulos, Charalampos ; Kalivas, Grigorios
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Patras, Patras, Greece
fYear
2010
fDate
26-28 April 2010
Firstpage
93
Lastpage
98
Abstract
In this paper, the design and implementation of a low complexity Direct Sequence Ultra-Wideband (DS-UWB) receiver subsystem which incorporates a Channel Estimator (CE) and a novel hybrid Partial/Selective (HPS) RAKE Receiver (RR) using maximal ratio combining (MRC) is presented. The proposed architecture demonstrates the tradeoff between energy capture, performance and receiver complexity by combining the benefits of both partial and selective RAKE receiver algorithms. We focus our work on a highly parallel, modular, synthesizable design which is based on FPGA technology and it is optimized for high performance.
Keywords
channel estimation; design; field programmable gate arrays; radio receivers; receivers; ultra wideband communication; DS-UWB; FPGA technology; channel estimator; direct sequence ultra-wideband receiver subsystem; hybrid partial-selective RAKE receiver; maximal ratio combining; receiver complexity; synthesizable design; Diversity reception; Energy capture; Fading; Fingers; Intersymbol interference; Multipath channels; Pulse modulation; RAKE receivers; Ultra wideband technology; Wireless sensor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
MELECON 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference
Conference_Location
Valletta
Print_ISBN
978-1-4244-5793-9
Type
conf
DOI
10.1109/MELCON.2010.5476334
Filename
5476334
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