Title :
Open fault detection method for CMOS-LSI by supplying pulsed voltage signal to VDD and GND lines
Author :
Sumitomo, Hiroshi ; Nakamura, Toyokazu
Author_Institution :
Anal. & Evaluation Technol. Center, NEC Corp., Tokyo, Japan
Abstract :
An easy and rapid failure analysis method to detect CMOS-LSI open faults has been developed. This method exploits both the properties of CMOS structure and the voltage contrast image. By supplying pulsed signal to VDD and GND, and observing the voltage contrast image, open faults appear different from the rest of the LSI. An image processing system is proposed which improves image observability and thereby decreases inspection time
Keywords :
CMOS integrated circuits; failure analysis; fault diagnosis; image processing; inspection; integrated circuit testing; large scale integration; CMOS-LSI; GND line; VDD line; failure analysis; image processing; inspection time; open fault detection; pulsed voltage signal; voltage contrast image; Cathode ray tubes; Circuit faults; Electron beams; Failure analysis; Fault detection; Frequency synchronization; Large scale integration; Pulse inverters; Testing; Voltage;
Conference_Titel :
Physical & Failure Analysis of Integrated Circuits, 1997., Proceedings of the 1997 6th International Symposium on
Print_ISBN :
0-7803-3985-1
DOI :
10.1109/IPFA.1997.638123
