• DocumentCode
    2526632
  • Title

    Design and modeling of a novel 4H-SiC normally-off BMFET transistor for power applications

  • Author

    Pezzimenti, Fortunato ; Della Corte, Francesco

  • Author_Institution
    DIMET Mediterranea, Univ. of Reggio Calabria, Reggio Calabria, Italy
  • fYear
    2010
  • fDate
    26-28 April 2010
  • Firstpage
    1129
  • Lastpage
    1134
  • Abstract
    First numerical simulation results targeted to the design of a novel 4H-SiC normally-off Bipolar Mode Field Effect Transistor (BMFET) are presented. Starting from a commonly available 4H-SiC epitaxial wafer, with an epitaxial layer with a thickness of a few tens of microns, and considering a completely planar device structure where the highly doped source and gate regions are defined by means of implant technology, the developed analysis predicts the feasibility of a transistor well suitable for high power applications, with a very high current gain, a forward current density up to 1 kA/cm2, an on-state output resistance in the order of few mΩ×cm2 and a blocking voltage in the range of 1-2 kV. The 4H-SiC fundamental physical models, such as the doping incomplete ionization and the carrier recombination processes, were carefully taken into account during the simulations. Modeling the device output characteristics in the various operation conditions (off-state, active region, saturation), the role of different design parameters was investigated.
  • Keywords
    ionisation; numerical analysis; power bipolar transistors; power field effect transistors; semiconductor doping; silicon compounds; 4H-SiC epitaxial wafer; 4H-SiC fundamental physical model; 4H-SiC normally-off bipolar mode field effect transistor; SiC; active region condition; carrier recombination process; doping incomplete ionization; implant technology; numerical simulation; off-state condition; power application; saturation condition; Current density; Doping; Epitaxial layers; FETs; Implants; Ionization; Numerical simulation; Semiconductor device modeling; Semiconductor process modeling; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    MELECON 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference
  • Conference_Location
    Valletta
  • Print_ISBN
    978-1-4244-5793-9
  • Type

    conf

  • DOI
    10.1109/MELCON.2010.5476362
  • Filename
    5476362