Alternative interface methods for testing high speed bidirectional signals

This paper addresses a critical issue faced in the testing of devices and modules that support bi-directional data paths switching in a nanosecond or less. Current methods are first summarized and clarified in order to highlight their limitations when applied to higher performance signals. Next, two alternatives are presented that overcome these limitations. An “interleaving” method uses a single, matched-impedance transmission line between the device-under-test (DUT) and the test system pin electronics. The transmission line delay is carefully matched to the desired data rate to avoid “bus contention” problems at the pin electronics receiver. This method supports high speed signals and switching rates, but is limited to discrete frequencies. The second method proposes the use of technology-specific transceivers, located very close to the DUT. This method greatly reduces the “transmission-line” effects and supports high speed bi-directional testing throughout a wide range of frequencies. Furthermore, it represents a significant paradigm shift from the traditional ATE architecture that has so far provided general-purpose pin electronics on every test channel. In the long run, separation and specialization of the “pin electronics” may ultimately reduce future ATE costs