DocumentCode :
2527032
Title :
Versatile BIST: an integrated approach to on-line/off-line BIST
Author :
Karri, Ramesh ; Mukherjee, Nilanjan
Author_Institution :
Lucent Bell Labs., Princeton, NJ, USA
fYear :
1998
fDate :
18-23 Oct 1998
Firstpage :
910
Lastpage :
917
Abstract :
In this paper we report a versatile BIST approach (VBIST) that targets both off-line and on-line self test. VBIST uses off-line BIST circuitry for on-line testing as well. Unlike traditional on-line self test approaches, VBIST does not use functional data as test inputs. Rather, VBIST generates test patterns and compacts test responses during the normal mode of operation. Furthermore, VBIST coordinates this generation and application of test patterns and compaction of test responses with the usage profile of the modules in the design. VBIST entails little additional impact on performance and area of the design (vis-a-vis the performance and area of a design with off-line BIST). We validated the VBIST approach using the Synopsys Behavioral Compiler as the synthesis framework and by writing synthesis scripts for incorporating VBIST constraints
Keywords :
VLSI; automatic test pattern generation; built-in self test; fault diagnosis; integrated circuit testing; program compilers; VBIST constraints; off-line BIST; on-line BIST; synopsys behavioral compiler; synthesis scripts; test patterns; test responses; usage profile; versatile BIST approach; Automatic testing; Built-in self-test; Circuit testing; Clocks; Compaction; Delay; Hardware; Logic testing; Test pattern generators; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-5093-6
Type :
conf
DOI :
10.1109/TEST.1998.743283
Filename :
743283
Link To Document :
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