Impact of post processing damage on the performance of high dielectric constant PLZT thin film capacitors for ULSI DRAM applications

Author

Khamankar, R. ; Jiyoung Kim ; Bo Jiang ; Sudhama, C. ; Maniar, P. ; Moazzami, R. ; Jones, R. ; Lee, J.

Author_Institution

Microelectron. Res. Center, Texas Univ., Austin, TX, USA

fYear

1994

fDate

11-14 Dec. 1994

Firstpage

337

Lastpage

340

Abstract

The exposure of PLZT thin films to post deposition processes may have a detrimental effect on the properties of the films. Hence for the proper integration of these films into CMOS technology, these effects need to be studied and improved upon. Fresh devices have been exposed to x-rays, plasma and forming gas anneals. Each of these processes is seen to cause a significant change in the DRAM polarization, leakage current and the reliability properties. An annealing technique has been proposed for a complete recovery in these properties.<>

Keywords

CMOS memory circuits; DRAM chips; ULSI; X-ray effects; annealing; integrated circuit reliability; lanthanum compounds; lead compounds; leakage currents; permittivity; piezoceramics; thin film capacitors; CMOS technology; DRAM polarization; PLZT; PLZT thin film capacitors; PbLaZrO3TiO3; ULSI DRAM applications; annealing technique; dielectric constant; forming gas anneals; leakage current; plasma processing; post processing damage; reliability properties; x-ray effects; Annealing; CMOS technology; Capacitors; Dielectric thin films; High-K gate dielectrics; Plasma devices; Plasma temperature; Plasma x-ray sources; Polarization; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-2111-1

Type

conf

DOI

10.1109/IEDM.1994.383399

Filename

383399