DocumentCode :
2527357
Title :
A compact 32-bit AES design for embedded system
Author :
Benhadjyoussef, Noura ; Machhout, Mohsen ; El hadj youssef, Wajih ; Tourki, Rached
Author_Institution :
Physic Dept., Electron. & Micro-Electron. Lab. (E μ E L), Monastir, Tunisia
fYear :
2012
fDate :
16-18 May 2012
Firstpage :
1
Lastpage :
4
Abstract :
Recently, much research has been conducted for security of data transactions on embedded platforms. Advanced Encryption Standard (AES) is considered as one of a candidate algorithm for data encryption/decryption. One important application of this standard is cryptography on smart cards. In this paper we describe a 32-bits architecture developed for Rijndael algorithm to accelerate execution on 32-bits platforms with reduced memory. Using the FPGA device xc5vfx70t-2ff1136-6, a very low-cost implementation of 375 occupied Slices is obtained under 303.364 MHz frequency.
Keywords :
cryptography; design engineering; embedded systems; field programmable gate arrays; smart cards; FPGA device; Rijndael algorithm; advanced encryption standard; candidate algorithm; compact 32-bit AES design; data decryption; data encryption; data transaction security; embedded platforms; embedded system; smart cards; Algorithm design and analysis; Encryption; Field programmable gate arrays; Program processors; Standards; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2012 7th International Conference on
Conference_Location :
Gammarth
Print_ISBN :
978-1-4673-1926-3
Type :
conf
DOI :
10.1109/DTIS.2012.6232955
Filename :
6232955
Link To Document :
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