DocumentCode :
2527392
Title :
Automated synthesis of large phase shifters for built-in self-test
Author :
Rajski, Janusz ; Tamarapalli, Nagesh ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
fYear :
1998
fDate :
18-23 Oct 1998
Firstpage :
1047
Lastpage :
1056
Abstract :
The paper introduces a new algorithm for the automated synthesis of phase shifters-circuits used to remove effects of structural dependencies featured by two-dimensional test generators. The algorithms presented in the paper synthesize in a time-efficient manner very large and fast phase shifters for built in self-test environment, with guaranteed minimal phase shifts between scan chains, and very low delay and area of virtually one 2-way XOR gate per channel
Keywords :
automatic test pattern generation; binary sequences; built-in self test; logic testing; shift registers; automated synthesis; built-in self-test; large phase shifters; linear feedback shift register; logic synthesis; minimal phase shifts; one 2-way XOR gate per channel; parallel scan chains; scan chains; structural dependencies; time-efficient synthesis; two-dimensional test generators; very large fast phase shifters; very low delay; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Delay; Flip-flops; Graphics; Hardware; Phase shifters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-5093-6
Type :
conf
DOI :
10.1109/TEST.1998.743303
Filename :
743303
Link To Document :
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