Title :
Analytical dynamic power model for LUT based components
Author :
Najoua, Chalbi ; Mohamed, Boubaker ; Hedi, Bedoui Mohamed
Author_Institution :
Med. Fac., Biophys. Lab., Monastir, Tunisia
Abstract :
This paper presents fast field programmable gate array (FPGA) analytical dynamic power models for basic operators at the RTL (Register Transfer Level) level. The methodology is an adaptation of an existing incremental power estimation method for Look Up Table based components. The models are based on the frequency, the activity rate and the input precision by using the Xpower tool with a free glitching. We have validated our approach by using the Euclidean distance computing application. The results show that the estimate is even closer to the real value when we use mathematical models of IPs with combination operators and the average accuracy of the model is higher and the maximum reached average error is equal to 3.14%. The power model is verified by on board measurement bench based on a Virtex2Pro FPGA real environment.
Keywords :
field programmable gate arrays; power supply circuits; table lookup; Euclidean distance computing application; FPGA analytical dynamic power models; LUT based components; RTL level; Virtex2Pro FPGA real environment; Xpower tool; basic operators; combination operators; field programmable gate array analytical dynamic power models; free glitching; incremental power estimation method; look up table based components; mathematical models; maximum reached average error; on board measurement bench; register transfer level; Adders; Computer architecture; Estimation; Field programmable gate arrays; Integrated circuit modeling; Mathematical model; Power measurement; FPGA; IPs; RTL level; dynamic power models;
Conference_Titel :
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2012 7th International Conference on
Conference_Location :
Gammarth
Print_ISBN :
978-1-4673-1926-3
DOI :
10.1109/DTIS.2012.6232957
