Title :
How we test Siemens Embedded DRAM Cores
Author :
McConnell, Roderick ; Möller, Udo ; Richter, Detlev
Author_Institution :
Siemens Semicond., Munich, Germany
Abstract :
The techniques used to test Siemens Embedded DRAM Cores are described. Test Isolation and Design-For-Test logic is built in to the core interface, while external access and Algorithmic Pattern Generation are handled by a central Test Controller. All tests used for standard DRAM´s can be applied to the DRAM cores, but only a subset of these are used for any given product
Keywords :
DRAM chips; automatic test pattern generation; built-in self test; design for testability; embedded systems; integrated circuit testing; logic testing; modules; DFT logic; Siemens embedded DRAM cores; algorithmic pattern generation; central test controller; core interface; external access; memory module; modular construction; package test; product-specific test; scan-based ATPG; test isolation; transparent access; wafer test; Algorithm design and analysis; Bandwidth; Centralized control; Design for testability; Logic design; Logic testing; Packaging; Random access memory; Semiconductor device testing; Test pattern generators;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743313
