Title :
PROJECT GRAMS: A graphical reconfigurable architecture MIPS simulator
Author :
Bautista, Patrick Ian ; Cruz, Arnold ; Rio, A.C. ; Reyes, Joy Alinda
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. of the Philippines
Abstract :
Studying trade-off analysis in computer architecture and higher-level computer organization can be very hard due to the small amount of detail given to it in undergraduate courses. The key concepts and processes taking place can be very difficult to understand by using pen and paper alone. A graphical simulator can be utilized to represent the concepts in a very intuitive and interactive manner thus revolutionizing and simplifying the way students and instructors learn and teach computer architecture. One of Project GRAMSpsila primary objectives is to provide methods to easily visualize the effects of instruction set reconfiguration in various datapath implementations. Another objective is to enable users to code and compile machine programs for testing a particular configurationpsilas performance and flexibility. Lastly, the software also presents a contextual and graphical representation of data exchange processes during an instructionpsilas execution. The project is written in JAVA and is designed to run in various computer platforms available in the academe.
Keywords :
Java; computer aided instruction; computer graphics; computer science education; educational courses; instruction sets; program compilers; program testing; reconfigurable architectures; teaching; JAVA; code machine program; compile machine program; computer architecture; contextual representation; data exchange process; graphical MIPS simulator; graphical reconfigurable architecture; higher-level computer organization; instruction execution; program testing; project GRAMS; undergraduate course; Animation; Application software; Assembly; Computational modeling; Computer architecture; Computer simulation; Discrete event simulation; Graphical user interfaces; Instruction sets; Reconfigurable architectures; Architecture Reconfiguration; Datapath; MIPS; Processor Simulation;
Conference_Titel :
TENCON 2008 - 2008 IEEE Region 10 Conference
Conference_Location :
Hyderabad
Print_ISBN :
978-1-4244-2408-5
Electronic_ISBN :
978-1-4244-2409-2
DOI :
10.1109/TENCON.2008.4766609