Title :
Stuck-at fault: a fault model for the next millennium
Author_Institution :
Illinois Univ., Urbana, IL, USA
Abstract :
One of the common misconceptions about a stuck-at fault model is that it does not model a physical defect accurately and therefore is not adequate for testing defects in advancing technologies. Stuck-at fault model can be described as anything but a physical defect model. You can call it abstract, logical, Boolean, symbolic, functional or behavioral model, but don´t call it a physical defect model! But that is not a weakness of the stuck-at fault model. To the contrary, abstraction is the main strength of this model and the reason for its longevity. Abstraction is also the reason that it will be the model of choice in the next millenium. By staying away from physical details stuck-at fault model remains effective with changing technologies and design styles. Stuck-at fault model operates in the logic domain while most physical level models operate in analog domain or even in the electromagnetic domain. With the rapidly growing number of transistors on a chip, abstraction is a necessity to manage complexity. So if anything the trend for the next millenium is likely to be a higher level of abstraction. Does the abstraction come at a cost in loss of defect detection? To answer this let us consider two major classes of defects: defects internal to a gate and defects external to a gate
Keywords :
automatic testing; fault diagnosis; integrated circuit testing; logic gates; logic testing; abstraction; defect detection; fault model; gate external defects; gate internal defects; logic domain; stuck-at faults; Boolean functions; CMOS logic circuits; CMOS process; Costs; Fault detection; Logic gates; Logic testing; Performance evaluation; Semiconductor device modeling; Wires;
Conference_Titel :
Test Conference, 1998. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5093-6
DOI :
10.1109/TEST.1998.743358