Title :
Submicron Large-Angle-Tilt Implanted Drain technology for mixed-signal applications
Author :
Hung-Sheng Chen ; Ji Zhao ; Chih Sieh Teng ; Moberly, L. ; Lahri, R.
Author_Institution :
Fairchild Res. Center, Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
This paper reports the use of LATID in submicron MOS technology to improve both analog and digital device performance and reliability. It is demonstrated that LATID technology not only improves device reliability, but also significantly improves output resistance and voltage gain. A submicron CMOS technology optimized for mixed-signal applications based on a conventional CMOS process has been fabricated without compromising digital performance or increasing process complexity.<>
Keywords :
CMOS integrated circuits; integrated circuit reliability; integrated circuit technology; ion implantation; mixed analogue-digital integrated circuits; LATID; large-angle-tilt implanted drain technology; mixed-signal applications; output resistance; reliability; submicron CMOS technology; voltage gain; CMOS process; CMOS technology; Circuits; Degradation; Immune system; MOS devices; Performance gain; Process design; Transconductance; Voltage;
Conference_Titel :
Electron Devices Meeting, 1994. IEDM '94. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-2111-1
DOI :
10.1109/IEDM.1994.383456
