DocumentCode
252860
Title
Advanced thermocompression flip chip bonding
Author
Clauberg, H. ; Rezvani, A. ; Galipeau, E. ; Wasserman, M. ; Colosimo, T. ; Frick, G. ; Buergi, D. ; Chylak, B.
Author_Institution
Kulicke & Soffa Ind., Inc., Fort Washington, PA, USA
fYear
2014
fDate
3-5 Dec. 2014
Firstpage
492
Lastpage
495
Abstract
Advancements in electronic device performance and cost have historically been driven by higher integration primarily provided by fab node shrinks that have followed the well-known Moore´s law. However, technological challenges and the continuously increasing cost of building new fabs have brought the performance/cost improvements achieved via node shrinks to come nearly to a halt. This leaves packaging innovation as the main vehicle for achieving future cost-performance improvements. Advanced packages which employ ultra-fine pitch flip chip technology for the first level interconnect for chip-to-substrate, chip-to-chip, or chip-to-interposer have been developed as an answer to obtaining higher performance. However, the relatively low throughput of the first generation thermocompression flip chip bonders has limited the wide-scale adoption of this technology. In this paper we shiw innovative bonder technology that can improve throughput and yield to make thermocompression bonding economically attractive. High throughput is achieved by carefully optimizing each aspect of the bonding cycle not just individually, but also from a system-level perspective. At the core of the bonder is the bondhead with a heating and cooling capability in excess of 200oC/sec and 100oC/sec, respectively, while maintaining thermal uniformity below +-5oC over the die surface and maintaining the error between commanded and actual temperature below 5oC as well. The bonding results show that Z accuracy of the bondlines is controlled to about +-1μm, even while undergoing nearly 200 oC temperature excursions at 200 oC /sec.
Keywords
cooling; flip-chip devices; integrated circuit bonding; integrated circuit interconnections; lead bonding; chip-to-chip interconnect; chip-to-interposer interconnect; chip-to-substrate interconnect; cooling; heating; thermal uniformity; thermocompression flip chip bonding; ultrafine pitch flip chip technology; Bonding; Cooling; Films; Heating; Stress; Temperature sensors; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th
Conference_Location
Singapore
Type
conf
DOI
10.1109/EPTC.2014.7028380
Filename
7028380
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