DocumentCode
2528887
Title
A rail to rail, slew-boosted pre-charge buffer
Author
Dine, H. ; Chuang, Sean ; Allen, Phillip E. ; Hasler, Paul
fYear
2006
fDate
21-24 May 2006
Abstract
A pre-charge buffer is designed in a 0.5 mum CMOS process. The buffer has rail to rail input capability, and makes use of a slew boosting mechanism, which senses current to enhance slew rate. Sensing current avoids overshoots when the buffer exits the slew-mode. The buffer has less than 60 ns settling time with better than 2 % settling accuracy. The slew rate is 156 V/mus with a quiescent current of 265 muA
Keywords
CMOS integrated circuits; buffer circuits; current mirrors; integrated circuit design; operational amplifiers; switched capacitor networks; 0.5 micron; 265 muA; CMOS process; current mirror; linear amplifiers; operational transconductor amplifier; sensing current; slew-boosted pre-charge buffer; switched capacitor design; Boosting; CMOS process; Circuit synthesis; MOS capacitors; Negative feedback; Rail to rail inputs; Sampling methods; Switched capacitor circuits; Switches; Voltage; Pre-charge buffer; rail to rail input; slew boosting;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1692523
Filename
1692523
Link To Document