DocumentCode :
2528920
Title :
Disturbance fault testing on various NAND flash memories
Author :
Hou, Chih-Sheng ; Li, Jin-Fu
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
fYear :
2012
fDate :
28-31 May 2012
Firstpage :
1
Lastpage :
1
Abstract :
Summary form only given. Due to the specific mechanism of functional operations, flash memories are prone to disturbance faults. Furthermore, different NAND flash memories might have some differences on the array organizations and the supported functional operations. In this paper, therefore, test algorithms for covering the disturbance faults in various types of NAND flash memories are developed.
Keywords :
NAND circuits; fault diagnosis; flash memories; integrated circuit testing; NAND flash memory; array organization; disturbance fault testing; functional operation; Algorithm design and analysis; Arrays; Ash; Europe; Flash memory; Organizations; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2012 17th IEEE European
Conference_Location :
Annecy
Print_ISBN :
978-1-4673-0696-6
Electronic_ISBN :
978-1-4673-0695-9
Type :
conf
DOI :
10.1109/ETS.2012.6233030
Filename :
6233030
Link To Document :
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