Electrical measurement and analysis of TSV/RDL for 3D integration

Author

Xin Sun ; Runiu Fang ; Yunhui Zhu ; Xiao Zhong ; Yuan Bian ; Shenglin Ma ; Min Miao ; Jing Chen ; Yan Wang ; Yufeng Jin

Author_Institution

Nat. Key Lab. on Micro/Nano Fabrication Technol., Peking Univ., Beijing, China

fYear

2014

fDate

3-5 Dec. 2014

Firstpage

709

Lastpage

712

Abstract

In this paper, electrical measurement and analysis of TSV/RDL is carried out, to evaluate the fabrication process and get a comprehensive understanding of electrical properties of TSV/RDL interconnect structures. DC resistance, leakage current and high frequency characterization are implemented. TSV shows a spreading distribution of DC resistance, with minimum of 4.3 mΩ. Leakage current of TSV reaches 150nA up to 30V without breakdown. Low substrate resistivity lowers the high frequency performance of TSV.

Keywords

electric resistance measurement; integrated circuit interconnections; integrated circuit packaging; leakage currents; three-dimensional integrated circuits; 3D integration; DC resistance; TSV/RDL interconnect structures; electrical measurement; high frequency characterization; leakage current; redistribution layers; substrate resistivity; through silicon via technology; Current measurement; Electrical resistance measurement; Leakage currents; Resistance; Substrates; Three-dimensional displays; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th

Conference_Location

Singapore

Type

conf

DOI

10.1109/EPTC.2014.7028399

Filename

7028399