• DocumentCode
    2529208
  • Title

    A Software-Based Self-Test methodology for on-line testing of data TLBs

  • Author

    Theodorou, Georgios ; Chatzopoulos, S. ; Kranitis, Nektarios ; Paschalis, Antonis ; Gizopoulos, D.

  • Author_Institution
    Dept. of Inf. & Telecommun., Univ. of Athens, Athens, Greece
  • fYear
    2012
  • fDate
    28-31 May 2012
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    For small memory arrays that usually lack Memory Built-In Self-Test (MBIST), such as Translation Lookaside Buffer (TLB) arrays, Software-Based Self-Test (SBST) can be a flexible and low-cost solution for on-line March test application. In this paper, an SBST program development methodology is proposed for on-line testing of data TLB (D-TLB), both for data (SRAM) and tag (CAM) memory arrays. The SBST methodology exploits existing special purpose instructions that modern ISAs implement to access the TLBs for debug-diagnostic purposes, termed hereafter Direct TLB Access (DTA) instructions, as well as, the trap handler mechanism.
  • Keywords
    SRAM chips; built-in self test; CAM; D-TLB; DTA instructions; MBIST; SBST program development methodology; SRAM; data-translation lookaside buffer array; direct TLB access instructions; memory arrays; memory built-in self-test; on-line March test application; on-line testing; software-based self-test methodology; Arrays; Built-in self-test; Computer aided manufacturing; Europe; Program processors; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ETS), 2012 17th IEEE European
  • Conference_Location
    Annecy
  • Print_ISBN
    978-1-4673-0696-6
  • Electronic_ISBN
    978-1-4673-0695-9
  • Type

    conf

  • DOI
    10.1109/ETS.2012.6233043
  • Filename
    6233043