An analysis of integrated power control and advanced receivers algorithms for reverse DS-CDMA link

In this paper the performances of integrated power control and advanced receivers algorithms are analyzed in the case of fixed step size algorithms, where power control command is issued as simple 1-bit command. The performances of the constrained power control and advanced receivers algorithms, where transmitter power cannot exceed some pre-defined maximum are also analyzed. It has been shown that fixed step size algorithms converge but the number of iterations is higher than that of inverse algorithms. Also, it is observed that power control command errors reduce the performance of the system. The constrained algorithm outperforms the non-constrained when the system is close to, or is infeasible