• DocumentCode
    2529603
  • Title

    Automated formal verification of protocols

  • Author

    Avresky, D.R. ; Vassilaras, S.

  • Author_Institution
    Dept. of Electr. Eng., Boston Univ., MA, USA
  • fYear
    1997
  • fDate
    22-25 Sep 1997
  • Firstpage
    166
  • Lastpage
    169
  • Abstract
    We adopt a formalism to describe protocols that is close to the human way of thinking and can be easily used to perform reachability analysis of the described protocol in a state-transition format. This formalism allows for an execution tree (ET) to be generated from a set of assertions such that all paths from the root to the leaves are well-defined formulas. We then extend the formalism with regards to real-time properties. Finally, we present a software verification tool, Verify, that implements the above features in the analysis of protocols
  • Keywords
    automatic programming; formal verification; protocols; reachability analysis; software tools; Verify; automated formal protocol verification; execution tree; leaves; protocols analysis; reachability analysis; real-time properties; root; software verification tool; state-transition format; Clocks; Formal verification; Humans; Logic; Nuclear power generation; Protocols; Reachability analysis; Safety; Software tools; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Communications and Networks, 1997. Proceedings., Sixth International Conference on
  • Conference_Location
    Las Vegas, NV
  • ISSN
    1095-2055
  • Print_ISBN
    0-8186-8186-1
  • Type

    conf

  • DOI
    10.1109/ICCCN.1997.623308
  • Filename
    623308
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2529603