Title :
Performance Analysis And Design Methodology For A Scalable Superscalar Architecture
Author :
Kaio, T. ; Ono, Toshihisa ; Bagherzadeh, Nader
Author_Institution :
University of California
Keywords :
Computer architecture; Design methodology; Dynamic scheduling; Hardware; Hazards; Out of order; Performance analysis; Processor scheduling; Scalability; Scheduling algorithm;
Conference_Titel :
Microarchitecture, 1992. MICRO 25., Proceedings of the 25th Annual International Symposium on
Print_ISBN :
0-8186-3175-9
DOI :
10.1109/MICRO.1992.697026