Title :
Low power architectures using localised non-volatile memory and selective power shut-down
Author :
Secareanu, Radu M. ; Hartin, Olin
Abstract :
A method and associated circuit and architectural implementations to reduce the power dissipation for the digital part of a system-on-a-chip (SOC) while maintaining the overall system performances (such as speed) unaffected are described. An alternative application is to provide fast recovery from a power shut-down event up to the level of instruction (or clock cycle) execution
Keywords :
integrated circuit design; low-power electronics; random-access storage; system-on-chip; localised nonvolatile memory; low power architecture; power dissipation; selective power shut-down; system-on-a-chip; Circuits and systems; Clocks; Digital systems; Magnetic circuits; Magnetic materials; Nonvolatile memory; Power dissipation; Power generation; Semiconductor materials; System-on-a-chip;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1692601
